Modifying the E3 Template Comp-Abstract: This application note describes how to modify the pulse shape (amplitude, rise- and fall-times) of Dallas DS3150, DS315x, and DS325x Line Interface Units (LIUs)...

DS21Qx5y BSDL Scan Chain Mappi-Abstract: This application note describes the JTAG hardware boundary scan functions of the quad port single chip transceivers (SCTs). The JTAG functionality for the quad ...

Power-Fault Protection Layout-Power-Faul...

DS2155 and DS26401 Software Co-Abstract: Application Note 403 describes the software considerations when migrating an existing design based on the DS2155 T1/E1/J1 single chip transceiver (SCT) to the D...

DS2148/DS21348 Hardware Mode-Abstract: Application Note 407 provides a focused view of the functionality of the Dallas Semiconductor/Maxim DS2148/DS21348 selectable E1 or T1 line interface unit (LIU) i...

T3/E3/STS-1网络的冗余保护-摘要：利润率优先于可靠性，这是在设计任何系统时都会被考虑到的一个重要问题。尤其是在电信行业，日益增强的竞争要求从购...

Bit Error Rate Testing the DS3-Abstract: This application note shows how to connect our enhanced bit error-rate tester (BERT) to our DS3/E3 framer using a ITU O.151 pattern in ungapped clock mode. Intr...

Switching Frame Mode In Live T-Abstract: This application note describes the hazard of switching frame mode while a T1 line is active. When using or testing T1 systems, it may be possible to switch bet...

DS2156 Utopia II总线与Dallas演示板的连-摘要：本应用笔记介绍怎样实现Dallas Semiconductor DS2156DK开发板的DS2156 Utopia II总线与DK101或DK2000演示母板的连接。DK101是低...

DS2155, DS21Q55, DS2156 Progra-Abstract: This application note provides a detailed description for using the SLC-96 multiframe in the DS2155, DS21Q55, and DS2156. Register values and an example flowcha...